10.46243/jstj.2018.v3.i3.174 registered
A Novel Reduced Switch Multilevel Inverter Using FPGA
Resolves to https://www.jst.org.in/index.php/pub/article/view/174
Held by Longman Publishers (India) · prefix 10.46243 live · DOI address https://doi.org/10.46243/jstj.2018.v3.i3.174
Registered 29 Sep 2026 via crossref · record version 2 · last change 29 Sep 2026, 11:59 PM · record sha256 26ef5477187dd185…
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What the DOI identifies
JournalArticle — an article in a journal · Digital · Visual · en
A Novel Reduced Switch Multilevel Inverter Using FPGA (PrincipalTitle)
Published 2018-05-04
Part of Journal of Science & Technology · ISSN 2456-5660 · volume 03 · issue 03 · pages 12–16
Agents
- A.T. Sankara Subramanian (author)
- R.Sooriya Priya Dharshini (author)
- R.siranjeevi (author)
- S.Joshua smith (author)
- Longman Publishers (publisher)
Identifiers DOI 10.46243/jstj.2018.v3.i3.174
Abstract
Multilevel inverters (MLI) are mostly used medium -voltage and high -power applications due to its attractive features. As the number of output voltage levels increases, the quality of the output voltage is improved leading to reduction of the filtering requirements. But multilevel inverter requires more number of power semicond uctor switches as number of levels increase that increases cost and complexity in control circuit. In this paper, an innovative topology for multilevel inverter is proposed which reduces the number of switches considerably without increasing the total stan ding voltage of the switches. The proposed topology is a general topology which can be extended for any number of voltage levels. This topology as reduced switch multilevel inverter, we implement and generate the PWM by FPGA Spartron3E processor using VHDL language
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Each element by the standard's name (Annex B: reference elements, then administrative) and the Handbook's (in grey), read off the record above.
| Element | Value | In the record |
|---|---|---|
| DOI Name DOI name | 10.46243/jstj.2018.v3.i3.174 | doi |
| Referent Type referentType | Creation | referent |
| Referent Sub-Type referentSubType | JournalArticle — an article in a journal | type |
| Referent Name(s) referentName(s) | A Novel Reduced Switch Multilevel Inverter Using FPGA (PrincipalTitle, en) | titles |
| Basic Metadata basicMetadata | author: A.T. Sankara Subramanian author: R.Sooriya Priya Dharshini author: R.siranjeevi author: S.Joshua smith publisher: Longman Publishers published: 2018-05-04 part of: Journal of Science & Technology · ISSN 2456-5660 · vol. 03 · no. 03 · pp. 12–16 language: en form: Digital · Visual · Language | agents, dates, container, language, structural_type, modes, characters |
| Referent Identifier(s) alternateIdentifier(s) | none besides the DOI | identifiers, relations (IsSameAs) |
| Registration Authority registrationAuthorityCode | Crossref — issued by Crossref (member 25296); held here as a copy | record.source_agency (our code, ra_doi_name, for names issued here once appointed) |
| Created Date issueDate | 2026-09-08 | record.registered (when the DOI name was first registered) |
| relatedIdentifiers | none needed — the descriptive metadata is in this record | container, relations (only where the descriptive metadata lives at another identifier) |
complete Every System Metadata element is here, with the basic metadata a journal article needs.
The System Metadata Declaration (JSON) · the Kernel Metadata Declaration (XML) · what each sub-type needs
History — the ledger
Every change to this DOI, in order, as it was recorded. Entries are only ever added, never changed or removed.
| # | When | What | By | Changes |
|---|---|---|---|---|
| 1 | 29 Sep 2026, 10:00 PM | register registered at Crossref; record read from api.crossref.org | Administrator (admin) | 105 fields set · sha256 4e499c7d7bdb… |
| 2 | 29 Sep 2026, 11:59 PM | update record re-read from api.crossref.org | Administrator (admin) | container.titles.0.value: |
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