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Sabarish. \"Integrated Bridgeless PWM Based Power Converters.\" International Journal of Advanced Research in Engineering & Technology (IJARET) 4.5 (2013): 17-23" } ], "record": { "registrant": "Longman Publishers", "registered": "2026-09-08", "updated": "2026-09-20", "issue_number": 1, "source": "crossref-api", "source_agency": "Crossref (member 25296)" } }, "url_after": "https://www.jst.org.in/index.php/pub/article/view/174", "sha256_before": null, "sha256_after": "4e499c7d7bdbf29c74c151eccf5216367f1819ea7f65b9685b1f3e189f2ce63f" }, { "seq": 2, "kind": "update", "at": "2026-09-29 23:59:52", "by": "Administrator (admin)", "by_kind": "user", "note": "record re-read from api.crossref.org", "changes": [ { "path": "container.titles.0.value", "from": "Journal of Science & Technology", "to": "Journal of Science & Technology" } ], "record_after": { "format": "smartscholars-doi-metadata/1.0", "doi": "10.46243/jstj.2018.v3.i3.174", "referent": "Creation", "type": "JournalArticle", "structural_type": "Digital", "modes": [ "Visual" ], "characters": [ "Language" ], "titles": [ { "value": "A Novel Reduced Switch Multilevel Inverter Using FPGA", "type": "PrincipalTitle", "lang": "en" } ], "identifiers": [ { "type": "DOI", "value": "10.46243/jstj.2018.v3.i3.174" } ], "agents": [ { "role": "author", "name": { "given": "A.T. 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As the number of output voltage levels increases, the quality of the output voltage is improved leading to reduction of the filtering requirements. But multilevel inverter requires more number of power semicond uctor switches as number of levels increase that increases cost and complexity in control circuit. In this paper, an innovative topology for multilevel inverter is proposed which reduces the number of switches considerably without increasing the total stan ding voltage of the switches. The proposed topology is a general topology which can be extended for any number of voltage levels. This topology as reduced switch multilevel inverter, we implement and generate the PWM by FPGA Spartron3E processor using VHDL language", "lang": "en" }, "license": { "url": "https://creativecommons.org/licenses/by/4.0/", "start": "2018-05-04", "applies_to": "vor" }, "references": [ { "key": "ref1", "unstructured": "Veena B M, Triveni M T: „Hardware Implementation of 5 Level Inverter Using Microcontroller‟" }, { "key": "ref2", "unstructured": "Shivanand Masaraddi, Dr. M.S.Aspalli Ammar Masaoud: „Cascaded H-Bridge Multilevel Inverter Using PIC16F877A Controller‟ Journal of Science and Technology" }, { "key": "ref3", "doi": "10.1109/tie.2013.2274424", "unstructured": "Babaei, E., Farhadi Kangarlu, M.: „Multilevel inverter with cross-connected st [1]V. Bist and B. Singh, “An adjustable speed PFC bridgeless buck–boost converter-fed BLDC motor drive,” IEEE Trans. Ind. Electron., vol. 61, no. 6, pp. 2665–2677, Jun. 2014. [2]B. Singh and V. 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