10.46243/jst.2022.v7.i02.pp21-29 registered
A comparative analysis of 128 bytes SRAM architecture using Single ended three and six transistor SRAM cells
Resolves to https://www.jst.org.in/index.php/pub/article/view/253
Held by Longman Publishers (India) · prefix 10.46243 live · DOI address https://doi.org/10.46243/jst.2022.v7.i02.pp21-29
Registered 29 Sep 2026 via crossref · record version 2 · last change 29 Sep 2026, 11:59 PM · record sha256 424548e5d8e5be3d…
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What the DOI identifies
JournalArticle — an article in a journal · Digital · Visual · en
A comparative analysis of 128 bytes SRAM architecture using Single ended three and six transistor SRAM cells (PrincipalTitle)
Published 2022-07-03
Part of Journal of Science & Technology · ISSN 2456-5660 · volume 7 · issue 2 · pages 21–29
Agents
- B.N. Srinivasarao B.N. Srinivasarao (author)
- Longman Publishers (publisher)
Identifiers DOI 10.46243/jst.2022.v7.i02.pp21-29
Abstract
Static RAM architecture is an important part in the digital data processing devices like DSP’s Micro Processors and Embedded systems for general purpose or specific purpose applications. Demand of manufacturing compact devices are increasing day by day, to make the compact devices the design of internal circuits area also should be reduced. This will in turn reduces the overall size of the device. In this paper two 128 bytes SRAM architectures are implemented with conventional six transistors SRAM cell and single ended three transistor SRAM cell from the scratch to layout level. The designs are compared in terms of power consumption, area, and speed with 45nm technology. The implemented design area is reduced by 57.14% with 92.37% reduced power consumption and with 89.98% improved performance.
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Each element by the standard's name (Annex B: reference elements, then administrative) and the Handbook's (in grey), read off the record above.
| Element | Value | In the record |
|---|---|---|
| DOI Name DOI name | 10.46243/jst.2022.v7.i02.pp21-29 | doi |
| Referent Type referentType | Creation | referent |
| Referent Sub-Type referentSubType | JournalArticle — an article in a journal | type |
| Referent Name(s) referentName(s) | A comparative analysis of 128 bytes SRAM architecture using Single ended three and six transistor SRAM cells (PrincipalTitle, en) | titles |
| Basic Metadata basicMetadata | author: B.N. Srinivasarao B.N. Srinivasarao publisher: Longman Publishers published: 2022-07-03 part of: Journal of Science & Technology · ISSN 2456-5660 · vol. 7 · no. 2 · pp. 21–29 language: en form: Digital · Visual · Language | agents, dates, container, language, structural_type, modes, characters |
| Referent Identifier(s) alternateIdentifier(s) | none besides the DOI | identifiers, relations (IsSameAs) |
| Registration Authority registrationAuthorityCode | Crossref — issued by Crossref (member 25296); held here as a copy | record.source_agency (our code, ra_doi_name, for names issued here once appointed) |
| Created Date issueDate | 2024-02-16 | record.registered (when the DOI name was first registered) |
| relatedIdentifiers | none needed — the descriptive metadata is in this record | container, relations (only where the descriptive metadata lives at another identifier) |
complete Every System Metadata element is here, with the basic metadata a journal article needs.
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History — the ledger
Every change to this DOI, in order, as it was recorded. Entries are only ever added, never changed or removed.
| # | When | What | By | Changes |
|---|---|---|---|---|
| 1 | 29 Sep 2026, 10:00 PM | register registered at Crossref; record read from api.crossref.org | Administrator (admin) | 82 fields set · sha256 3390a281b9f4… |
| 2 | 29 Sep 2026, 11:59 PM | update record re-read from api.crossref.org | Administrator (admin) | abstract.value: container.titles.0.value: |
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