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10.46243/jst.2020.v5.i5.pp246-252 registered

Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN)

Resolves to https://www.jst.org.in/index.php/pub/article/view/359

Held by Longman Publishers (India) · prefix 10.46243 live · DOI address https://doi.org/10.46243/jst.2020.v5.i5.pp246-252

Registered 29 Sep 2026 via crossref · record version 2 · last change 29 Sep 2026, 11:59 PM · record sha256 1ec0f3fb4bf00cc6…

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What the DOI identifies

JournalArticle — an article in a journal · Digital · Visual · en

Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN) (PrincipalTitle)

Published 2020

Part of Journal of Science & Technology · ISSN 2456-5660 · volume 05 · issue 05 · pages 246–252

Agents

  • G.Usha Rani (author)
  • J.Sneha Latha (author)
  • Longman Publishers (publisher)

Identifiers DOI 10.46243/jst.2020.v5.i5.pp246-252

Abstract

A constant growth in the number of microelectronic devices and applications is accompanied by a constant rise in the need forgoods that are genuine and secure, as well as for electronic systems that are trustworthy. The security requirements for the vast majority of applications are quite stringent and continually evolving, as is the case with most technologies. On top of that, new and more intricate assaults are being developed on a regular basis. These assaults typically have a significantly higher impact than regular attacks, and there is nothing that can be done to compensate for them other than to deploy more software countermeasures to protect against them. The outcome is the development of a PUF (Physical Unclonable Function) system based on clock networks with the goal of improving security. In the rapidly developing field of on-chip Physical Unclonable Functions (PUFs), a powerful security primitive with the capability of addressing a wide range of security challenges is emerging as a viable option. Specific to electrical circuits, we demonstrated a PUF system based on a clock network that may beused to overcome the security difficulties associated with such circuits. An unclonable circuit is created by merging the clock network, return path, and multiplexer (Mux) blocks together. This is a circuit that cannot be reproduced. Sinks are included in the clock network, and they are used to split the data received as input. When a signal is transferred from the clock network to the mux network, the return path is used to transmit the information. Mux networks are made up of three components: a multiplexer, a delay buffer, and an SR latch (synchronous response latch). When the PUF circuit responds, it returns a single bit that cannot be replicated. In a circuit, a PUF is an external device that may be used to prevent cloning of the circuit from taking place. An effective power supply unit (PUF) must have the ability to endure changes in circuit timing that are both reversible and irreversible in nature. For a wide range of applications, PUF functions provide low-cost, high-efficiency, and secure identification and authentication of devices using a number of methods. Anyone attempting to replicatethe protected circuit in its same form will find it difficult, and as a result, they will not be able to achieve the same functionality as the device. As a consequence, we will be able to prevent the gadget from being replicated in the future.

Licence https://creativecommons.org/licenses/by/4.0

System metadata — ISO 26324:2025, Annex B · DOI Handbook 10.1

Each element by the standard's name (Annex B: reference elements, then administrative) and the Handbook's (in grey), read off the record above.

ElementValueIn the record
DOI Name
DOI name
10.46243/jst.2020.v5.i5.pp246-252doi
Referent Type
referentType
Creationreferent
Referent Sub-Type
referentSubType
JournalArticle — an article in a journaltype
Referent Name(s)
referentName(s)
Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN) (PrincipalTitle, en)titles
Basic Metadata
basicMetadata
author: G.Usha Rani
author: J.Sneha Latha
publisher: Longman Publishers
published: 2020
part of: Journal of Science & Technology · ISSN 2456-5660 · vol. 05 · no. 05 · pp. 246–252
language: en
form: Digital · Visual · Language
agents, dates, container, language, structural_type, modes, characters
Referent Identifier(s)
alternateIdentifier(s)
none besides the DOIidentifiers, relations (IsSameAs)
Registration Authority
registrationAuthorityCode
Crossref — issued by Crossref (member 25296); held here as a copyrecord.source_agency (our code, ra_doi_name, for names issued here once appointed)
Created Date
issueDate
2026-09-10record.registered (when the DOI name was first registered)
relatedIdentifiersnone needed — the descriptive metadata is in this recordcontainer, relations (only where the descriptive metadata lives at another identifier)

complete Every System Metadata element is here, with the basic metadata a journal article needs.

The System Metadata Declaration (JSON) · the Kernel Metadata Declaration (XML) · what each sub-type needs

History — the ledger

Every change to this DOI, in order, as it was recorded. Entries are only ever added, never changed or removed.

#WhenWhatByChanges
129 Sep 2026, 10:00 PMregister
registered at Crossref; record read from api.crossref.org
Administrator (admin) 86 fields set · sha256 fa7e31d03f5c…
229 Sep 2026, 11:59 PMupdate
record re-read from api.crossref.org
Administrator (admin)
container.titles.0.value: Journal of Science & Technology → Journal of Science & Technology

Machine-readable: the history as JSON, with the full record after each change.

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