Smart Scholars🛡 Scholar Shield🏛 Research Integrity Desk🧩 Portfolio Console📰 Journals🔧 DOI MembersTools🔎 Journal AuditGI GetIndexedDr DOI Doctor

Cite this DOI

10.46243/jst.2020.v5.i5.pp246-252 · Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN)

APA (7th edition)

Rani, G., & Latha, J. (2020). Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN). *Journal of Science & Technology*, *05*(05), 246–252. https://doi.org/10.46243/jst.2020.v5.i5.pp246-252

⬇ text Italics are shown as *asterisks* in plain text — the journal or book title and the volume.

BibTeX

@article{rani2020design,
  author    = {Rani, G.Usha and Latha, J.Sneha},
  title     = {{Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN)}},
  journal   = {Journal of Science \& Technology},
  year      = {2020},
  volume    = {05},
  number    = {05},
  pages     = {246--252},
  publisher = {Longman Publishers},
  issn      = {2456-5660},
  doi       = {10.46243/jst.2020.v5.i5.pp246-252},
  url       = {https://doi.org/10.46243/jst.2020.v5.i5.pp246-252},
  language  = {en},
  abstract  = {A constant growth in the number of microelectronic devices and applications is accompanied by a constant rise in the need forgoods that are genuine and secure, as well as for electronic systems that are trustworthy. The security requirements for the vast majority of applications are quite stringent and continually evolving, as is the case with most technologies. On top of that, new and more intricate assaults are being developed on a regular basis. These assaults typically have a significantly higher impact than regular attacks, and there is nothing that can be done to compensate for them other than to deploy more software countermeasures to protect against them. The outcome is the development of a PUF (Physical Unclonable Function) system based on clock networks with the goal of improving security. In the rapidly developing field of on-chip Physical Unclonable Functions (PUFs), a powerful security primitive with the capability of addressing a wide range of security challenges is emerging as a viable option. Specific to electrical circuits, we demonstrated a PUF system based on a clock network that may beused to overcome the security difficulties associated with such circuits. An unclonable circuit is created by merging the clock network, return path, and multiplexer (Mux) blocks together. This is a circuit that cannot be reproduced. Sinks are included in the clock network, and they are used to split the data received as input. When a signal is transferred from the clock network to the mux network, the return path is used to transmit the information. Mux networks are made up of three components: a multiplexer, a delay buffer, and an SR latch (synchronous response latch). When the PUF circuit responds, it returns a single bit that cannot be replicated. In a circuit, a PUF is an external device that may be used to prevent cloning of the circuit from taking place. An effective power supply unit (PUF) must have the ability to endure changes in circuit timing that are both reversible and irreversible in nature. For a wide range of applications, PUF functions provide low-cost, high-efficiency, and secure identification and authentication of devices using a number of methods. Anyone attempting to replicatethe protected circuit in its same form will find it difficult, and as a result, they will not be able to achieve the same functionality as the device. As a consequence, we will be able to prevent the gadget from being replicated in the future.}
}

⬇ .bib

RIS (EndNote, Zotero, Mendeley)

TY  - JOUR
TI  - Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN)
AU  - Rani, G.Usha
AU  - Latha, J.Sneha
JO  - Journal of Science & Technology
PY  - 2020
DA  - 2020///
VL  - 05
IS  - 05
SP  - 246
EP  - 252
PB  - Longman Publishers
SN  - 2456-5660
LA  - en
AB  - A constant growth in the number of microelectronic devices and applications is accompanied by a constant rise in the need forgoods that are genuine and secure, as well as for electronic systems that are trustworthy. The security requirements for the vast majority of applications are quite stringent and continually evolving, as is the case with most technologies. On top of that, new and more intricate assaults are being developed on a regular basis. These assaults typically have a significantly higher impact than regular attacks, and there is nothing that can be done to compensate for them other than to deploy more software countermeasures to protect against them. The outcome is the development of a PUF (Physical Unclonable Function) system based on clock networks with the goal of improving security. In the rapidly developing field of on-chip Physical Unclonable Functions (PUFs), a powerful security primitive with the capability of addressing a wide range of security challenges is emerging as a viable option. Specific to electrical circuits, we demonstrated a PUF system based on a clock network that may beused to overcome the security difficulties associated with such circuits. An unclonable circuit is created by merging the clock network, return path, and multiplexer (Mux) blocks together. This is a circuit that cannot be reproduced. Sinks are included in the clock network, and they are used to split the data received as input. When a signal is transferred from the clock network to the mux network, the return path is used to transmit the information. Mux networks are made up of three components: a multiplexer, a delay buffer, and an SR latch (synchronous response latch). When the PUF circuit responds, it returns a single bit that cannot be replicated. In a circuit, a PUF is an external device that may be used to prevent cloning of the circuit from taking place. An effective power supply unit (PUF) must have the ability to endure changes in circuit timing that are both reversible and irreversible in nature. For a wide range of applications, PUF functions provide low-cost, high-efficiency, and secure identification and authentication of devices using a number of methods. Anyone attempting to replicatethe protected circuit in its same form will find it difficult, and as a result, they will not be able to achieve the same functionality as the device. As a consequence, we will be able to prevent the gadget from being replicated in the future.
DO  - 10.46243/jst.2020.v5.i5.pp246-252
UR  - https://doi.org/10.46243/jst.2020.v5.i5.pp246-252
ER  -

⬇ .ris

CSL-JSON

{
    "type": "article-journal",
    "id": "10.46243/jst.2020.v5.i5.pp246-252",
    "DOI": "10.46243/jst.2020.v5.i5.pp246-252",
    "URL": "https://doi.org/10.46243/jst.2020.v5.i5.pp246-252",
    "title": "Design of (PUF) Physical Unclonable Function Using FPGA and Secured Clock Network (SCN)",
    "source": "Smart Scholars DOI Registry",
    "container-title": "Journal of Science & Technology",
    "author": [
        {
            "family": "Rani",
            "given": "G.Usha"
        },
        {
            "family": "Latha",
            "given": "J.Sneha"
        }
    ],
    "issued": {
        "date-parts": [
            [
                2020
            ]
        ]
    },
    "volume": "05",
    "issue": "05",
    "page": "246-252",
    "publisher": "Longman Publishers",
    "language": "en",
    "abstract": "A constant growth in the number of microelectronic devices and applications is accompanied by a constant rise in the need forgoods that are genuine and secure, as well as for electronic systems that are trustworthy. The security requirements for the vast majority of applications are quite stringent and continually evolving, as is the case with most technologies. On top of that, new and more intricate assaults are being developed on a regular basis. These assaults typically have a significantly higher impact than regular attacks, and there is nothing that can be done to compensate for them other than to deploy more software countermeasures to protect against them. The outcome is the development of a PUF (Physical Unclonable Function) system based on clock networks with the goal of improving security. In the rapidly developing field of on-chip Physical Unclonable Functions (PUFs), a powerful security primitive with the capability of addressing a wide range of security challenges is emerging as a viable option. Specific to electrical circuits, we demonstrated a PUF system based on a clock network that may beused to overcome the security difficulties associated with such circuits. An unclonable circuit is created by merging the clock network, return path, and multiplexer (Mux) blocks together. This is a circuit that cannot be reproduced. Sinks are included in the clock network, and they are used to split the data received as input. When a signal is transferred from the clock network to the mux network, the return path is used to transmit the information. Mux networks are made up of three components: a multiplexer, a delay buffer, and an SR latch (synchronous response latch). When the PUF circuit responds, it returns a single bit that cannot be replicated. In a circuit, a PUF is an external device that may be used to prevent cloning of the circuit from taking place. An effective power supply unit (PUF) must have the ability to endure changes in circuit timing that are both reversible and irreversible in nature. For a wide range of applications, PUF functions provide low-cost, high-efficiency, and secure identification and authentication of devices using a number of methods. Anyone attempting to replicatethe protected circuit in its same form will find it difficult, and as a result, they will not be able to achieve the same functionality as the device. As a consequence, we will be able to prevent the gadget from being replicated in the future.",
    "ISSN": "2456-5660"
}

⬇ .json What citeproc and reference managers read; the DOI system hands it out for Accept: application/vnd.citationstyles.csl+json, and so does this registry's resolver.

From the record as registered (version 2) — the record and its history. Programs: https://registry.smartscholars.in/api.php?action=cite&doi=10.46243%2Fjst.2020.v5.i5.pp246-252 gives all four in one JSON answer.

Everything Smart Scholars runsNine sites, one account. A journal starts at the audit; an author starts at Scholar Shield.

For journals & publishers

Start with the audit — it is free, and it is the gate to everything else.

DOI care

Nine services on one journal profile — each previews first and acts only on your approval.

For authors & researchers

Free to use. Nothing you check is shared with the journal.

For institutions, sponsors & DOI operators

Smart Scholars

Mon–Sat, 10:00–19:00 IST. The Ask AI button on every page answers about our services at any hour.

News

Policies

What we can register a DOI for

20 kinds of record, one account, one place. Every one gets a DOI that resolves, metadata that indexes read, and a record that stays correct afterwards.
Journals
  • Journal articles
  • Journal titles
  • Pending publications
  • Peer reviews
  • Preprints & posted content
Books & conferences
  • Books
  • Book chapters
  • Book series
  • Book sets
  • Conference proceedings
  • Proceedings series
  • Conference papers
Other research output
  • Theses & dissertations
  • Reports & working papers
  • Report series
  • Standards
  • Databases
  • Datasets
  • Figures, tables & supplements
Funding
  • Grants & funding awards

Elsewhere

The same company, in the places our publishers already read.
Smart Scholars · Every service on one pageData from OpenAlex (openalex.org), CC0 · Crossref · ISSN Portal · DOAJContact
WhatsApp