Cite this DOI
10.46243/jst.2021.v6.i05.pp146-167 · The State-of-the-Art in IC Reverse Engineering
APA (7th edition)
G Shobha, B Swetha, & V David (2021). The State-of-the-Art in IC Reverse Engineering. *Journal of Science & Technology*, *06*(05), 146–167. https://doi.org/10.46243/jst.2021.v6.i05.pp146-167
⬇ text Italics are shown as *asterisks* in plain text — the journal or book title and the volume.
BibTeX
@article{gshobha2021stateoftheart,
author = {G Shobha and B Swetha and V David},
title = {{The State-of-the-Art in IC Reverse Engineering}},
journal = {Journal of Science \& Technology},
year = {2021},
month = {oct},
volume = {06},
number = {05},
pages = {146--167},
publisher = {Longman Publishers},
issn = {2456-5660},
doi = {10.46243/jst.2021.v6.i05.pp146-167},
url = {https://doi.org/10.46243/jst.2021.v6.i05.pp146-167},
language = {en},
abstract = {This paper gives an overview of the place of reverse engi- neering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. The continuous drive of Moores law to increase the integration levelof silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns, and demanding the adoption of new and more sophisticated technology to analyse chips. Hardware encryption embedded in chips adds a whole other level of difficulty to IC analysis. This paper covers product teardowns, and discusses the techniques used for system-level analysis, both hardware and software; circuit extraction, taking the chip down to the transistor level, and working back up through the interconnects to create schematics; and process analysis, looking athow a chip is made, and what it is made of. Examples are also given of each type of RE. The paper concludes with a case study of the analysisof an IC with embedded encryption hardware.}
}RIS (EndNote, Zotero, Mendeley)
TY - JOUR TI - The State-of-the-Art in IC Reverse Engineering AU - G Shobha AU - B Swetha AU - V David JO - Journal of Science & Technology PY - 2021 DA - 2021/10/29/ VL - 06 IS - 05 SP - 146 EP - 167 PB - Longman Publishers SN - 2456-5660 LA - en AB - This paper gives an overview of the place of reverse engi- neering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. The continuous drive of Moores law to increase the integration levelof silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns, and demanding the adoption of new and more sophisticated technology to analyse chips. Hardware encryption embedded in chips adds a whole other level of difficulty to IC analysis. This paper covers product teardowns, and discusses the techniques used for system-level analysis, both hardware and software; circuit extraction, taking the chip down to the transistor level, and working back up through the interconnects to create schematics; and process analysis, looking athow a chip is made, and what it is made of. Examples are also given of each type of RE. The paper concludes with a case study of the analysisof an IC with embedded encryption hardware. DO - 10.46243/jst.2021.v6.i05.pp146-167 UR - https://doi.org/10.46243/jst.2021.v6.i05.pp146-167 ER -
CSL-JSON
{
"type": "article-journal",
"id": "10.46243/jst.2021.v6.i05.pp146-167",
"DOI": "10.46243/jst.2021.v6.i05.pp146-167",
"URL": "https://doi.org/10.46243/jst.2021.v6.i05.pp146-167",
"title": "The State-of-the-Art in IC Reverse Engineering",
"source": "Smart Scholars DOI Registry",
"container-title": "Journal of Science & Technology",
"author": [
{
"family": "G Shobha"
},
{
"family": "B Swetha"
},
{
"family": "V David"
}
],
"issued": {
"date-parts": [
[
2021,
10,
29
]
]
},
"volume": "06",
"issue": "05",
"page": "146-167",
"publisher": "Longman Publishers",
"language": "en",
"abstract": "This paper gives an overview of the place of reverse engi- neering (RE) in the semiconductor industry, and the techniques used to obtain information from semiconductor products. The continuous drive of Moores law to increase the integration levelof silicon chips has presented major challenges to the reverse engineer, obsolescing simple teardowns, and demanding the adoption of new and more sophisticated technology to analyse chips. Hardware encryption embedded in chips adds a whole other level of difficulty to IC analysis. This paper covers product teardowns, and discusses the techniques used for system-level analysis, both hardware and software; circuit extraction, taking the chip down to the transistor level, and working back up through the interconnects to create schematics; and process analysis, looking athow a chip is made, and what it is made of. Examples are also given of each type of RE. The paper concludes with a case study of the analysisof an IC with embedded encryption hardware.",
"ISSN": "2456-5660"
} ⬇ .json What citeproc and reference managers read; the DOI system hands it out for Accept: application/vnd.citationstyles.csl+json, and so does this registry's resolver.
From the record as registered (version 2) — the record and its history. Programs: https://registry.smartscholars.in/api.php?action=cite&doi=10.46243%2Fjst.2021.v6.i05.pp146-167 gives all four in one JSON answer.
