{ "ok": true, "doi": "10.46243/jstj.2019.v4.i6.99", "doi_display": "10.46243/jstj.2019.v4.i6.99", "doi_url": "https://doi.org/10.46243/jstj.2019.v4.i6.99", "state": "registered", "url": "https://www.jst.org.in/index.php/pub/article/view/99", "title": "Design and Analysis of D-Flip Flop Based Shift Registers using GDI Technique", "version": 2, "registered_via": "crossref", "prefix": { "prefix": "10.46243", "status": "live" }, "registrant": { "name": "Longman Publishers", "kind": "publisher", "country": "India" }, "reserved_at": null, "registered_at": "2026-09-29 22:00:33", "updated_at": "2026-09-29 23:59:52", "withdrawn_at": null, "withdrawn_reason": null, "record": { "format": "smartscholars-doi-metadata/1.0", "doi": "10.46243/jstj.2019.v4.i6.99", "referent": "Creation", "type": "JournalArticle", "structural_type": "Digital", "modes": [ "Visual" ], "characters": [ "Language" ], "titles": [ { "value": "Design and Analysis of D-Flip Flop Based Shift Registers using GDI Technique", "type": "PrincipalTitle", "lang": "en" } ], "identifiers": [ { "type": "DOI", "value": "10.46243/jstj.2019.v4.i6.99" } ], "agents": [ { "role": "author", "name": { "given": "", "family": "D.Manikanta" }, "sequence": "first" }, { "role": "author", "name": { "given": "", "family": "T.Malleswara Rao" }, "sequence": "additional" }, { "role": "publisher", "name": { "org": "Longman Publishers" } } ], "dates": { "published": "2019-11-01", "date_type": "PublicationDate", "online": "2019-11-01" }, "language": "en", "container": { "type": "Journal", "titles": [ { "value": "Journal of Science & Technology", "type": "PrincipalTitle" } ], "identifiers": [ { "type": "ISSN", "value": "2456-5660", "medium": "electronic" } ], "volume": "04", "issue": "06", "pages": { "first": "01", "last": "07" } }, "links": [ { "url": "https://www.jst.org.in/index.php/pub/article/view/99", "return_type": "text/html", "primary": true }, { "url": "https://www.jst.org.in/index.php/pub/article/download/99/87", "purpose": "text-mining", "return_type": "application/pdf" }, { "url": "https://www.jst.org.in/index.php/pub/article/download/99/3200", "purpose": "text-mining", "return_type": "application/xml" }, { "url": "https://www.jst.org.in/index.php/pub/article/view/99/87", "purpose": "similarity-checking" } ], "abstract": { "value": "As technology advances push for smaller devices and faster operations, power consumption and become severe problems when designing high-speed ICs. Power dissipation is an important parameter in the design of VLSI circuits, and the clock network is responsible for a substantial part of it. Low Power digital CMOS becomes more and more interesting; due to the general advances in process technology and due to new low power applications. These challenging concerns are mainly due to the excessive switching activity in the chip that keeps increasing proportionally to the frequency augment and the number of transistors. In this paper a new 6 transistor D-Flip-Flop based on GDI technique is designed and Shift Registers including Serial in Serial out , Serial in Parallel out , Parallel in Serial Out , Parallel in Parallel Out are designed based on this newly designed D-Flip-Flop and layouts are also designed using Micro wind. Keywords:", "lang": "en" }, "license": { "url": "https://creativecommons.org/licenses/by/4.0/", "start": "2019-11-01", "applies_to": "vor" }, "references": [ { "key": "ref1", "unstructured": "N.Vishnu vardhan reddy, c. Leela mohan, m. Srilakshmi” gdi based subthreshold low power d- flipflop” internaional journal of vlsi and embedded systems-ijves, vol 04, article 06112;pp.502-506" }, { "key": "ref2", "doi": "10.1109/iscas.2004.1329361", "unstructured": "Morgenstein, A. Fish, I. Wagner, ―An Efficient Implementation of D Flip-Flop Using the GDI Technique,‖ ISCAS’04, pp. 673-676, May2004" }, { "key": "ref3", "doi": "10.1109/tvlsi.2002.801578", "unstructured": "Morgenshtein, A. Fish, I.A. Wagner, ―Gate-Diffusion Input(GDI) –Power Efficient Method for Digital Combinatorial Circuits,‖ IEEE Trans.VLSI, vol. 10, no. 5, pp. 566-581, October2002" }, { "key": "ref4", "unstructured": "Arcady Morgenshteid, Alexander Fish2 a nd Israel A.Wagner3Gatediffusion input (GDI) –a novel power efficient method for digital circuits: A design methodology 0-7803-6741- 3~901/$10.000 2001IEEE" }, { "key": "ref5", "unstructured": "Mathan.N, Ravi.T and Logashanmugam.E, “Design And Analysis Of Low Power Single Edge Triggered D Fli p Flop Based Shift Registers”, International Journal of Emerging Technology and Advanced Engineering, Volume 3,Issue 2,Feb 2013,pp.279-283" }, { "key": "ref6", "unstructured": "Nilesh P. Bobade,“Design and Performance of CMOS Circuits in microwind”. IJCA, Jan’2012, wardha. M.S.,India" }, { "key": "ref7", "doi": "10.1049/el:20050316", "unstructured": "M. H. Cheng, and Z.W. Wu, \"Low-power low-voltage reference using peaking current mirror circuit,\" ELECTRONICS LETTERS, Vol. 41, No. 10, May 12,2005" }, { "key": "ref8", "unstructured": "Mathan.N, Ravi.T and Kannan.V, “Low Power Single Edge Triggered D Flip Flop based shift registers using 3 2nm Technology”, International Journal of Technology, Volume 2, Issue 2, Feb 2013,pp.1-5" }, { "key": "ref9", "doi": "10.1109/4.126534", "unstructured": "Chandrakasan A.P. Sheng S. Brodersen R.W.: “Low-power CMOS digital design”, IEEE Journal of Solid-State Circuits, Volume 27, Issue4, April 1992 Page(s):473–484" } ], "record": { "registrant": "Longman Publishers", "registered": "2026-09-07", "updated": "2026-09-20", "issue_number": 1, "source": "crossref-api", "source_agency": "Crossref (member 25296)" } }, "record_sha256": "87dc3dc3e6b48191561e87af5787a03d1c6f73ca5674909f340dc87a7926095c", "handle": { "synced_at": "2026-10-01 18:13:34", "url": "https://www.jst.org.in/index.php/pub/article/view/99" }, "links": { "record_page": "https://registry.smartscholars.in/record.php?doi=10.46243%2Fjstj.2019.v4.i6.99", "system_metadata": "https://registry.smartscholars.in/resolve.php?doi=10.46243%2Fjstj.2019.v4.i6.99&as=system", "history": "https://registry.smartscholars.in/api.php?action=history&doi=10.46243%2Fjstj.2019.v4.i6.99", "kernel_xml": "https://registry.smartscholars.in/resolve.php?doi=10.46243%2Fjstj.2019.v4.i6.99&as=xml" } }