Cite this DOI

Dr.K.BabuRao, Z.NagaSivareddy, P.Aravind, & T.RakeshBabu (2024). Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications. *Journal of Science & Technology*, *09*(04), 103–112. https://doi.org/10.46243/jst.2024.v9.i4.pp103-112

@article{drkbaburao2024performance,
  author    = {Dr.K.BabuRao and Z.NagaSivareddy and P.Aravind and T.RakeshBabu},
  title     = {{Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications}},
  journal   = {Journal of Science \& Technology},
  year      = {2024},
  month     = {apr},
  volume    = {09},
  number    = {04},
  pages     = {103--112},
  publisher = {Longman Publishers},
  issn      = {2456-5660},
  doi       = {10.46243/jst.2024.v9.i4.pp103-112},
  url       = {https://doi.org/10.46243/jst.2024.v9.i4.pp103-112},
  language  = {en},
  abstract  = {Approximate computing improves performance in error-resilient applications like image andvideo processing. Multipliers are part of its computing unit, which frequently requires a large numberofresources.Thisstudycomparesanapproximation(8;2)compressortootherknownmodelsintermsof quality, power consumption, delay, and circuit area. The proposed approximation compressor isimplementedin8×8and16×16multipliers.Todemonstratethequalityofthesuggestedcompressor,an8×8approximationmultiplierwas utilizedtomultiplytwoimagesinMATLABtools.QualitativemeasuressuchasSSIMandPSNRwereexaminedandacceptableresultswereobtained. Thesuggested8×8multiplier circuitproducesan acceptableerrorrate,asindicatedbytheMEDandNEDaccuracycriteria. Finally, we used a Synopsys Design Compiler to synthesize the proposed approximationcompressorandmultiplierdesigns.Thesuggested16×16multiplierimproveslatency,area,andpowerdelayproductsby5\%,17\%,and8\%,respectively,comparedtosimilarcurrentapproximatemultipliers.}
}

TY  - JOUR
TI  - Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications
AU  - Dr.K.BabuRao
AU  - Z.NagaSivareddy
AU  - P.Aravind
AU  - T.RakeshBabu
JO  - Journal of Science & Technology
PY  - 2024
DA  - 2024/04/16/
VL  - 09
IS  - 04
SP  - 103
EP  - 112
PB  - Longman Publishers
SN  - 2456-5660
LA  - en
AB  - Approximate computing improves performance in error-resilient applications like image andvideo processing. Multipliers are part of its computing unit, which frequently requires a large numberofresources.Thisstudycomparesanapproximation(8;2)compressortootherknownmodelsintermsof quality, power consumption, delay, and circuit area. The proposed approximation compressor isimplementedin8×8and16×16multipliers.Todemonstratethequalityofthesuggestedcompressor,an8×8approximationmultiplierwas utilizedtomultiplytwoimagesinMATLABtools.QualitativemeasuressuchasSSIMandPSNRwereexaminedandacceptableresultswereobtained. Thesuggested8×8multiplier circuitproducesan acceptableerrorrate,asindicatedbytheMEDandNEDaccuracycriteria. Finally, we used a Synopsys Design Compiler to synthesize the proposed approximationcompressorandmultiplierdesigns.Thesuggested16×16multiplierimproveslatency,area,andpowerdelayproductsby5%,17%,and8%,respectively,comparedtosimilarcurrentapproximatemultipliers.
DO  - 10.46243/jst.2024.v9.i4.pp103-112
UR  - https://doi.org/10.46243/jst.2024.v9.i4.pp103-112
ER  -

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    "DOI": "10.46243/jst.2024.v9.i4.pp103-112",
    "URL": "https://doi.org/10.46243/jst.2024.v9.i4.pp103-112",
    "title": "Performance Evaluation of Approximate (8; 2) Compressor for Multipliers in Error-Resilient Image Processing Applications",
    "source": "Smart Scholars DOI Registry",
    "container-title": "Journal of Science & Technology",
    "author": [
        {
            "family": "Dr.K.BabuRao"
        },
        {
            "family": "Z.NagaSivareddy"
        },
        {
            "family": "P.Aravind"
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            "family": "T.RakeshBabu"
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        "date-parts": [
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                2024,
                4,
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    "volume": "09",
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    "page": "103-112",
    "publisher": "Longman Publishers",
    "language": "en",
    "abstract": "Approximate computing improves performance in error-resilient applications like image andvideo processing. Multipliers are part of its computing unit, which frequently requires a large numberofresources.Thisstudycomparesanapproximation(8;2)compressortootherknownmodelsintermsof quality, power consumption, delay, and circuit area. The proposed approximation compressor isimplementedin8×8and16×16multipliers.Todemonstratethequalityofthesuggestedcompressor,an8×8approximationmultiplierwas utilizedtomultiplytwoimagesinMATLABtools.QualitativemeasuressuchasSSIMandPSNRwereexaminedandacceptableresultswereobtained. Thesuggested8×8multiplier circuitproducesan acceptableerrorrate,asindicatedbytheMEDandNEDaccuracycriteria. Finally, we used a Synopsys Design Compiler to synthesize the proposed approximationcompressorandmultiplierdesigns.Thesuggested16×16multiplierimproveslatency,area,andpowerdelayproductsby5%,17%,and8%,respectively,comparedtosimilarcurrentapproximatemultipliers.",
    "ISSN": "2456-5660"
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From the record as registered (version 2) — the record and its history. Programs: https://registry.smartscholars.in/api.php?action=cite&doi=10.46243%2Fjst.2024.v9.i4.pp103-112 gives all four in one JSON answer.