Cite this DOI

M Venkataratnam, M. V. (2022). Cluster Computing for Web-Scale Data Processing. *Journal of Science & Technology*, *7*(9), 199–211. https://doi.org/10.46243/jst.2022.v7.i09.pp199-211

@article{mvenkataratnam2022cluster,
  author    = {M Venkataratnam, M Venkataratnam},
  title     = {{Cluster Computing for Web-Scale Data Processing}},
  journal   = {Journal of Science \& Technology},
  year      = {2022},
  month     = {may},
  volume    = {7},
  number    = {9},
  pages     = {199--211},
  publisher = {Longman Publishers},
  issn      = {2456-5660},
  doi       = {10.46243/jst.2022.v7.i09.pp199-211},
  url       = {https://doi.org/10.46243/jst.2022.v7.i09.pp199-211},
  language  = {en},
  abstract  = {Power efficiency and real-time processing are important requirements in mobile video applications, particularly for MPEG-4 video encoding. Motion estimation is one of the most computationally intensive components of video encoding and can significantly affect the power consumption and hardware complexity of the encoder. This paper presents a content-based adaptive motion estimation engine that combines Full Search (FS) and Three-Step Search (TSS) according to the characteristics of video content. The proposed approach dynamically classifies motion conditions and selects an appropriate search strategy to achieve a balance between computational complexity and visual quality. A flexible block matching unit based on a 16-processing-element SIMD architecture is designed together with on-chip SRAM to support pixel reuse and reduce external memory accesses. The proposed motion estimation engine was implemented using TSMC 0.18 μm technology. Simulation results show that the computational burden is reduced to approximately 3\%–4\% of that of conventional Full Search while maintaining visual quality close to Full Search. The VLSI implementation achieves a clock frequency of 4.16 MHz for QCIF video at 15 frames per second and 33.3 MHz for CIF video at 30 frames per second. The estimated power consumption is 2.88 mW for QCIF processing at 1.6 V, demonstrating the suitability of the proposed architecture for low-power, real-time MPEG-4 video applications.}
}

TY  - JOUR
TI  - Cluster Computing for Web-Scale Data Processing
AU  - M Venkataratnam, M Venkataratnam
JO  - Journal of Science & Technology
PY  - 2022
DA  - 2022/05/11/
VL  - 7
IS  - 9
SP  - 199
EP  - 211
PB  - Longman Publishers
SN  - 2456-5660
LA  - en
AB  - Power efficiency and real-time processing are important requirements in mobile video applications, particularly for MPEG-4 video encoding. Motion estimation is one of the most computationally intensive components of video encoding and can significantly affect the power consumption and hardware complexity of the encoder. This paper presents a content-based adaptive motion estimation engine that combines Full Search (FS) and Three-Step Search (TSS) according to the characteristics of video content. The proposed approach dynamically classifies motion conditions and selects an appropriate search strategy to achieve a balance between computational complexity and visual quality. A flexible block matching unit based on a 16-processing-element SIMD architecture is designed together with on-chip SRAM to support pixel reuse and reduce external memory accesses. The proposed motion estimation engine was implemented using TSMC 0.18 μm technology. Simulation results show that the computational burden is reduced to approximately 3%–4% of that of conventional Full Search while maintaining visual quality close to Full Search. The VLSI implementation achieves a clock frequency of 4.16 MHz for QCIF video at 15 frames per second and 33.3 MHz for CIF video at 30 frames per second. The estimated power consumption is 2.88 mW for QCIF processing at 1.6 V, demonstrating the suitability of the proposed architecture for low-power, real-time MPEG-4 video applications.
DO  - 10.46243/jst.2022.v7.i09.pp199-211
UR  - https://doi.org/10.46243/jst.2022.v7.i09.pp199-211
ER  -

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    "URL": "https://doi.org/10.46243/jst.2022.v7.i09.pp199-211",
    "title": "Cluster Computing for Web-Scale Data Processing",
    "source": "Smart Scholars DOI Registry",
    "container-title": "Journal of Science & Technology",
    "author": [
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            "family": "M Venkataratnam",
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    "volume": "7",
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    "publisher": "Longman Publishers",
    "language": "en",
    "abstract": "Power efficiency and real-time processing are important requirements in mobile video applications, particularly for MPEG-4 video encoding. Motion estimation is one of the most computationally intensive components of video encoding and can significantly affect the power consumption and hardware complexity of the encoder. This paper presents a content-based adaptive motion estimation engine that combines Full Search (FS) and Three-Step Search (TSS) according to the characteristics of video content. The proposed approach dynamically classifies motion conditions and selects an appropriate search strategy to achieve a balance between computational complexity and visual quality. A flexible block matching unit based on a 16-processing-element SIMD architecture is designed together with on-chip SRAM to support pixel reuse and reduce external memory accesses. The proposed motion estimation engine was implemented using TSMC 0.18 μm technology. Simulation results show that the computational burden is reduced to approximately 3%–4% of that of conventional Full Search while maintaining visual quality close to Full Search. The VLSI implementation achieves a clock frequency of 4.16 MHz for QCIF video at 15 frames per second and 33.3 MHz for CIF video at 30 frames per second. The estimated power consumption is 2.88 mW for QCIF processing at 1.6 V, demonstrating the suitability of the proposed architecture for low-power, real-time MPEG-4 video applications.",
    "ISSN": "2456-5660"
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From the record as registered (version 2) — the record and its history. Programs: https://registry.smartscholars.in/api.php?action=cite&doi=10.46243%2Fjst.2022.v7.i09.pp199-211 gives all four in one JSON answer.