Cite this DOI

KUMAR, K., MOUNIKA, K., BABU, T., GOUD, N., ROOHI, T., & SIRISHA, M. (2021). RESOLUTION TWO-STEP TDC CMOS BY PULSE-SHRINKING FINE STAGE, BUILT-IN COARSE GAIN CALIBRATION. *Journal of Science & Technology*, *06*(02), 154–163. https://doi.org/10.46243/jst.2021.v6.i02.pp154-163

@article{kumar2021resolution,
  author    = {KUMAR, K.SHRAVAN and MOUNIKA, K and BABU, T.VEERA and GOUD, N.KALYAN and ROOHI, TAMAKANTH and SIRISHA, M},
  title     = {{RESOLUTION TWO-STEP TDC CMOS BY PULSE-SHRINKING FINE STAGE, BUILT-IN COARSE GAIN CALIBRATION}},
  journal   = {Journal of Science \& Technology},
  year      = {2021},
  month     = {feb},
  volume    = {06},
  number    = {02},
  pages     = {154--163},
  publisher = {Longman Publishers},
  issn      = {2456-5660},
  doi       = {10.46243/jst.2021.v6.i02.pp154-163},
  url       = {https://doi.org/10.46243/jst.2021.v6.i02.pp154-163},
  language  = {en},
  abstract  = {This article proposes a computerized converter (TDC) solution that can meet a broad range of knowledge and fine-time goals at the same time. The proposed TDC utilizes a beat contracting (PS) plot for a precise target and two-advance (TS)engineering for a larger range in the second phase. The suggested PS TDC solves the undesired non-uniform contracting rate issue that plagues conventional PS TDCs by using an assumed counterbalance beat and a balance beat width detecting method. Due to sign spread and extension fraud between coarse and fine phases, the proposed TS architecture achieves nonlinearity with a few methods, resulting in an inferred coarse increase adjustment mechanism. The replication findings in a 0.18-m normal CMOS innovation show 2.0-ps targets and 16-piece go connected to 130-ns input time interim of 0.08-mm2 area in a TDC modification. With an 18.0 maws 1.8-V supply, it has a single-shot accuracy of 1.44 ps and operates at 3.3 MS/s.}
}

TY  - JOUR
TI  - RESOLUTION TWO-STEP TDC CMOS BY PULSE-SHRINKING FINE STAGE, BUILT-IN COARSE GAIN CALIBRATION
AU  - KUMAR, K.SHRAVAN
AU  - MOUNIKA, K
AU  - BABU, T.VEERA
AU  - GOUD, N.KALYAN
AU  - ROOHI, TAMAKANTH
AU  - SIRISHA, M
JO  - Journal of Science & Technology
PY  - 2021
DA  - 2021/02/02/
VL  - 06
IS  - 02
SP  - 154
EP  - 163
PB  - Longman Publishers
SN  - 2456-5660
LA  - en
AB  - This article proposes a computerized converter (TDC) solution that can meet a broad range of knowledge and fine-time goals at the same time. The proposed TDC utilizes a beat contracting (PS) plot for a precise target and two-advance (TS)engineering for a larger range in the second phase. The suggested PS TDC solves the undesired non-uniform contracting rate issue that plagues conventional PS TDCs by using an assumed counterbalance beat and a balance beat width detecting method. Due to sign spread and extension fraud between coarse and fine phases, the proposed TS architecture achieves nonlinearity with a few methods, resulting in an inferred coarse increase adjustment mechanism. The replication findings in a 0.18-m normal CMOS innovation show 2.0-ps targets and 16-piece go connected to 130-ns input time interim of 0.08-mm2 area in a TDC modification. With an 18.0 maws 1.8-V supply, it has a single-shot accuracy of 1.44 ps and operates at 3.3 MS/s.
DO  - 10.46243/jst.2021.v6.i02.pp154-163
UR  - https://doi.org/10.46243/jst.2021.v6.i02.pp154-163
ER  -

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    "DOI": "10.46243/jst.2021.v6.i02.pp154-163",
    "URL": "https://doi.org/10.46243/jst.2021.v6.i02.pp154-163",
    "title": "RESOLUTION TWO-STEP TDC CMOS BY PULSE-SHRINKING FINE STAGE, BUILT-IN COARSE GAIN CALIBRATION",
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            "family": "MOUNIKA",
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        {
            "family": "BABU",
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    "publisher": "Longman Publishers",
    "language": "en",
    "abstract": "This article proposes a computerized converter (TDC) solution that can meet a broad range of knowledge and fine-time goals at the same time. The proposed TDC utilizes a beat contracting (PS) plot for a precise target and two-advance (TS)engineering for a larger range in the second phase. The suggested PS TDC solves the undesired non-uniform contracting rate issue that plagues conventional PS TDCs by using an assumed counterbalance beat and a balance beat width detecting method. Due to sign spread and extension fraud between coarse and fine phases, the proposed TS architecture achieves nonlinearity with a few methods, resulting in an inferred coarse increase adjustment mechanism. The replication findings in a 0.18-m normal CMOS innovation show 2.0-ps targets and 16-piece go connected to 130-ns input time interim of 0.08-mm2 area in a TDC modification. With an 18.0 maws 1.8-V supply, it has a single-shot accuracy of 1.44 ps and operates at 3.3 MS/s.",
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From the record as registered (version 2) — the record and its history. Programs: https://registry.smartscholars.in/api.php?action=cite&doi=10.46243%2Fjst.2021.v6.i02.pp154-163 gives all four in one JSON answer.