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                    "from": null,
                    "to": "10.1143/jjap.45.3307"
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                    "to": "ref13"
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                    "from": null,
                    "to": "10.1109/iscas.2005.1464676"
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                    "to": "ref14"
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                    },
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                    },
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                    "value": "In this paper, the area of efficiency multiplier put a sign suggests a fixed width through a replica redundancy through adoption My tolerance for noise (ANT) architecture with a multiplier of fixed width to build a redundancy version precision cutting Masa (RPR). ANT proposed architecture can meet the demand for high precision, low power consumption, and region Efficiency. RPR fixed-width design with error compensation through the circles of the possibilities and statistical analysis. use the When a partial product of the correct input vectors and vectors fixed in the palace and put in place to reduce truncation errors, hardware Failure holding circuit can be simplified compensation. The multiplier ANT 16 × 16 bits, the circuit area in our RPR fixed width It may be less, energy consumption in the design of ants can be saved as compared with the ANT state of the art design",
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                    {
                        "key": "ref1",
                        "unstructured": "B. Melvin, “Let’s think analog,” in Proc. IEEE Com-put. Soc. Annu.Symp. VLSI, 2005, pp. 2–5"
                    },
                    {
                        "key": "ref2",
                        "unstructured": "International Technology Roadmap for Semiconductors [Online].Available: http://public.itrs.net"
                    },
                    {
                        "key": "ref3",
                        "doi": "10.1109/iih-msp.2006.265055",
                        "unstructured": "B. Melvin and Z. Haiyang, “Error-tolerance and multimedia,”in Proc. 2006 Int. Conf. Intell. Inf. Hiding and Multimedia SignalProcess., 2006, pp. 521–524"
                    },
                    {
                        "key": "ref4",
                        "doi": "10.1109/mdt.2004.8",
                        "unstructured": "M. A. Breuer, S. K. Gupta, and T. M. Mak, “Design and error tolerancein the presence of massive numbers of defects,” IEEE Des. TestComput., vol. 24, no. 3, pp. 216– 227, May-Jun. 2004"
                    },
                    {
                        "key": "ref5",
                        "doi": "10.1109/ats.2004.51",
                        "unstructured": "M. A. Breuer, “Intelligible test techniques to sup-port error-tolerance,”in Proc. Asian Test Symp., Nov. 2004, pp. 386–393"
                    },
                    {
                        "key": "ref6",
                        "doi": "10.1109/test.2005.1584081",
                        "unstructured": "K. J. Lee, T. Y. Hsieh, and M. A. Breuer, “A novel testing methodologybased on error-rate to support errortolerance,” in Proc. Int. Test Conf.,2005, pp. 1136–1144"
                    },
                    {
                        "key": "ref7",
                        "doi": "10.1109/dftvs.2005.38",
                        "unstructured": "S. Chong and A. Ortega, “Hardware testing for error tolerant multimediacompression based on linear transforms,” in Proc. Defect andFault Tolerance in VLSI Syst. Symp., 2005, pp. 523– 531"
                    },
                    {
                        "key": "ref8",
                        "doi": "10.1109/dftvs.2005.19",
                        "unstructured": "H. Chung and A. Ortega, “Analysis and testing for error tolerant motionestimation,” in Proc. Defect and Fault Tolerance in VLSI Syst. Symp.,2005, pp. 514–522"
                    },
                    {
                        "key": "ref9",
                        "unstructured": "H. H. Kuok, “Audio recording apparatus using an imperfect memorycircuit,” U.S. Patent 5 414 758, May 9, 1995"
                    },
                    {
                        "key": "ref10",
                        "doi": "10.1109/date.2007.364530",
                        "unstructured": "T. Y. Hsieh, K. J. Lee, and M. A. Breuer, “Reduction of detected acceptablefaults for yield improvement via errortolerance,” in Proc.Des., Automation and Test Eur. Conf. Exhib., 2007, pp. 1–6"
                    },
                    {
                        "key": "ref11",
                        "doi": "10.1109/tc.2005.145",
                        "unstructured": "V. Palem, “Energy aware computing through probabilisticswitching: A study of limits,” IEEE Trans. Comput., vol. 54, no. 9, pp.1123–1137, Sep. 2005"
                    },
                    {
                        "key": "ref12",
                        "doi": "10.7567/ssdm.2004.p1-8l",
                        "unstructured": "S. Cheemalavagu, P. Korkmaz, and K. V. Palem“Ultra low energycomputing via probabilistic algorithms and devices: CMOS deviceprimitives and the energy-probability relationship,” in Proc. 2004 Int.Conf. Solid State Devices and Materials, Tokyo, Japan, Sep. 2004, pp.402–403"
                    },
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                        "key": "ref13",
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                        "unstructured": "P. Korkmaz, B. E. S. Akgul, K. V. Palem, and L. N. Chakrapani, “Advocatingnoise as an agent forultra-low energy computing: Probabilisticcomplementary metal-oxidesemiconductor devices and their characteristics,”Jpn. J. Appl. Phys., vol. 45, no. 4B, pp. 3307–3316, 2006"
                    },
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